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MIC4807
Equivalent Logic Diagram
V DD
Micrel
A IN
50μA
B IN
C IN
Data-in
+
-
1.4V
Drive
Circuit
HVOUT 0
CS
Clear
OE
+
-
75μA
Address
Decoder
Total of
8 Channels
Drive
Circuit
HVOUT 7
OVER
TEMP
C IN B IN A IN
CS
Data-in
Clear
OE
Truth Table
CS
Clear Data-In C IN B IN A IN OE HVOUT 0 HVOUT 1 HVOUT 2 HVOUT 3 HVOUT 4 HVOUT 5 HVOUT 6 HVOUT 7
Functional Mode
X
H
L
L
L
L
L
L
L
L
X
L
H
H
H
H
H
H
H
H
H
X
X
X
D
D
D
D
D
D
D
D
X
X
X
L
L
L
L
H
H
H
H
X
X
X
L
L
H
H
L
L
H
H
X
X
X
L
H
L
H
L
H
L
H
X
X
H
H
H
H
H
H
H
H
H
L
H
P
D
P
P
P
P
P
P
P
H
H
P
P
D
P
P
P
P
P
P
H
H
P
P
P
D
P
P
P
P
P
H
H
P
P
P
P
D
P
P
P
P
H
H
P
P
P
P
P
D
P
P
P
H
H
P
P
P
P
P
P
D
P
P
H
H
P
P
P
P
P
P
P
D
P
H
H
P
P
P
P
P
P
P
P
D
H
Clear
Memory
Address HVOUT 0
Address HVOUT 1
Address HVOUT 2
Address HVOUT 3
Address HVOUT 4
Address HVOUT 5
Address HVOUT 6
Address HVOUT 7
Blanking
L = Low Logic Level
H = High Logic Level
D = Data (High or Low)
X = Don't Care
P = Previous State
7-8
October 1998
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